SAA7154

In February 2010, Trident acquired the set-top box and TV product lines from NXP’s BU Home. The products on this page are now a part of Trident Microsystems’ product offering for the television markets.

General Description

The SAA7154E; SAA7154H is a high-quality multistandard video decoder supporting 10-bit Analog-to-Digital Converter (ADC), enhanced PAL/NTSC comb filtering, more versatile Vertical Blanking Interval (VBI) data processing, high-definition component video and picture improvement processing facilities.

It targets a variety of performance-conscious applications like e.g. Personal Video Recording (PVR), Set-Top Boxes (STB), LCD projectors, LCD TVs and DVD recordable players.

A video decoder decodes PAL/NTSC/SECAM signals into baseband component video. This video decoder includes adaptive 2-dimensional luminance and chrominance separation; in addition, e.g. baseband component type input signals can be connected directly (RGB or Y-PB-PR, interlaced or progressive).

The decoded video (the digitized component video, respectively) can be output on an 8-bit or 10-bit wide ITU-656 expansion port (X-port); alternatively decoded video can be fed to a versatile video scaler to the Image port (I-port), which can be 8-bit, 16-bit or 24-bit wide. An analog On-Screen Display (OSD) interface allows to mix OSD data on the I-port and X-port video data; the digital OSD allows to add OSD data to the I-port video data.

Key Features

General

  • Sixteen analog input pins, allowing for multiple combinations of composite, s-video and component video
  • Eight 3-level capable sensor pins for D-connector or SCART AV- and RGB-switch signals (three of these can be active simultaneously); one fast blanking input
  • Four studio-quality 10-bit CMOS ADCs at four-fold ITU-656 oversampling (54 MHz)
  • I²C-bus read back of digital Automatic Gain Control (AGC) gain factor
  • Two buffered analog CVBS outputs, e.g. to drive teletext decoder or VCR recorder
  • Several D-terminal and SCART configurations possible
  • Level sensitive fast blanking (RGB switch control)
  • Multistandard video decoder PAL/SECAM/NTSC and their sub-standards
  • Automatic detection of any supported color standard, including 480p, 576p, 720p and 1080i component video
  • Optional digitizing of VGA (640 x 480) computer graphics with H-sync and V-sync (supports only 60 Hz vertical sync)
  • Detection of copy protected input signals according to the Macrovision standard, indicating level of protection, including progressive signals 480p and 576p
  • High-performance super-adaptive 2/4-line comb filter for 2-dimensional chrominance/luminance separation
  • HD0 component video input and output; detection of HD0/HD1 signals
  • Horizontal and vertical down-scaling and up-scaling to randomly sized windows; variable from zoom to 1/64 size (icon); the transfer data rates limit H-zoom and V-zoom:
    • Conversion to square pixel format
    • Vertical scaling with linear phase interpolation and accumulating filter for anti-aliasing (6-bit phase accuracy)
    • EDge-Guided vertical Interpolation (EDGI) used for zooming up to progressive line counts
  • Versatile Brightness-Contrast-Saturation (BCS) adjustment
  • Programmable picture improvements:
    • Blue stretching
    • o Green enhancement
    • Automatic skin tone correction
    • Color Transient Improvement (CTI)
    • Black and white stretching by histogram evaluation
    • Luminance sharpness control
  • RMS noise level estimation possible
  • Blue screen output in case of absent input signals
  • Versatile VBI data decoder, slicer, clock regeneration and byte synchronization
    • I²C-bus read back of most decoded data types (Closed Caption (CC), Gemstar1x, Gemstar2x, WSS625, WSS525 (CGMS), XDS and V-chip)
    • Optionally, raw data with dedicated gain and offset adjustment is available for software decoding
  • On-chip Line-Locked Clock (LLC) generation according to ITU-601 (standard definition) or SMPTE-293M/ITU-R BT.1358 (HD0)
  • Frame locked audio clock generation
  • CMOS 3.3 V (input/output) and 1.8 V (core) device; digital inputs and I/O ports are not 5 V tolerant
  • Support for programming through serial I²C-bus, full read back ability by an external controller, bit rate up to 400 kbit/s and auto increment
  • Software controlled power saving standby modes
  • Boundary scan test circuit complies to the IEEE Std. 1149.b1 -1994
  • Analog OSD input
  • Two package options: LBGA156 and QFP160
  • Lead-free LBGA156 package available

Improvements over SAA7119

  • Advanced 24-bit RGB output
  • De-interlacing for progressive displays: EDGI
  • Programmable cropping and scaling to TFT panel format and resolution
  • Support of panorama scaling and keystone correction
  • YUV to RGB matrix
  • Digital OSD input
  • Additional analog output; configurable to add of Y and C component input

Datasheet

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